This on-line tutorial is designed to help the MasterLink user understand how Direct Memory Access (DMA) transfers can be used to move data from a data acquisition board into the host-computer's memory or from host memory to the data acquisition board.

• What is DMA anyway?
• Why use DMA?
• What is required to use DMA?
• What are the details of DMA transfers?
• What are DMA handles and lists?
• How does DMA work?
• How is DMA output generated?

1. What is DMA anyway?

Direct Memory Access (DMA) is a method of data transfer in which the central processing unit (CPU) in the computer does not have to execute instructions to move the data. For example, when a PC-compatible computer is using DMA to acquire some analog input data from a data acquisition board, the processor (486, for example), can be executing a word processor application 'at the same time'. DMA accomplishes this feat by using dead time on the bus (the ISA bus, where expansion cards are attached to the computer), to perform the transfers. In this way, when the processor is not accessing an expansion card (which it is not, most of the time), the bus can be transferring data from the data acquisition board directly to the computer's memory.

Of course, at the hardware level, there is a lot more to it than this simple description implies, but the important feature of DMA transfer of data is that the processor does not need to be involved every time data is to be transferred -- the computer and the expansion board communicate without disturbing the processor.

2. Why use DMA?

DMA has several basic advantages over other methods for transferring data between expansion cards and computer memory. The first is that, during a DMA transfer, the computer processor does not need to be involved with the transfers. The second is that, since the processor is not involved, the actual management of a DMA transfer is typically simpler than other types of transfers.

Since, in a DMA transfer, the processor is not involved in the actual task of moving the data between the expansion card and the computer memory, it is free to work on other tasks in the system. One example of this is the writing of data to a disk file for permanent storage while more data is being acquired from the expansion card. Another example might be graphing the previously-acquired data, while the next data set is being acquired. In systems where data acquisition or output must be performed 'simultaneously' with some other processing, DMA can be a much simpler way of moving data than programmed I/O (where the processor executes instructions to move the data as part of the program which also graphs or stores the data), or interrupts (where the processor periodically stops executing the program which graphs or stores the data and transfers more data under the control of the processor). Also, data can be transferred in a more timely manner with DMA than with programmed I/O transfers because the transfer can occur when the hardware determines that the data is ready, rather than when the programmed I/O program reaches a point where the transfer is convenient.

Since DMA performs the data transfer without processor intervention, executing a transfer typically requires only a start sequence to establish where in the computer's memory transfers will occur, periodic status sequences to determine if the transfer is complete, and a stop sequence to terminate a running process or clean up after a process which completed on its own. These functions are also more easily implemented than processing via interrupts, which can take different forms on the various Windows operating systems, and whose execution times, or 'latencies', can vary substantially depending upon what programs and services are running on the system.

Advantages of Intelligent Instrumentation Hardware
Aside from the basic advantages of using DMA as the transfer scheme for data, the data acquisition boards from Intelligent Instrumentation which support DMA offer advantages over other such boards. The PCI-20428W Series of data acquisition boards support simultaneous input DMA, to transfer analog input data from the board to the computer's memory, and output DMA, to transfer analog output data from the computer's memory to the board. This capability allows 'stimulus/response' systems to be created, where the output DMA presents some type of a waveform to an external system and the input DMA records the response of that system to the output waveform. The PCI-20041C series of data acquisition boards support mixed data type transfers of data, both input and output. This allows both analog input and digital input data to be acquired from the board or both analog output and digital output data to be generated. This unique capability allows monitoring of multiple types of signals, as well as multiple signals of the same type. Prior to selecting an Intelligent Instrumentation board for use in DMA transfer of data, it would be advisable to consult your local Intelligent Instrumentation sales office for help in matching board capabilities to your application.

Advantages of MasterLink Software
In addition to supporting the unique features of Intelligent Instrumentation hardware, the MasterLink drivers allow the native capabilities of the PC-compatible computer to be extended. The basic design of PC-compatible computers, established when the original IBM PC was released, allow only a 64kbyte section of memory to be used by a given DMA transfer. That is, a single DMA transfer can consist of only 64kbytes of data (65536 bytes). MasterLink uses a unique software strategy to provide a solution to this hardware limitation under the Windows 3.x, Windows 95 and Windows NT operating systems. When using MasterLink, memory sections up to the size of available memory can be allocated and used for DMA data transfer.

3. What is required to use DMA?

All DMA transfers, whether from PC memory to an expansion card or from an expansion card to PC memory, use DMA buffers. These buffers are special areas of memory set aside to receive data from the expansion card to or provide the data to be sent to the expansion card. Because of limitations of the PC's DMA hardware, these buffers are limited in size and location. A DMA transfer uses a single buffer at a time. Buffers for DMA are allocated and released through functions provided by MasterLink. Through these functions, MasterLink hides the details of buffer allocation and management, allowing you to concentrate on processing your data.

Resource Allocation
Each expansion card which supports DMA uses at least one DMA channel. The PC supports up to 7 DMA channels (though some of these are not compatible with all expansion cards). No two expansion cards can be using the same DMA channel at the same time (and only a few cards support sharing of a DMA channel when they are not using it). In order to use your Intelligent Instrumentation data acquisition board for DMA, you must select a DMA channel which is not used by another card installed in the computer (sound cards frequently use one or even two DMA channels), and configure the data acquisition board for that DMA channel. Most Intelligent Instrumentation data acquisition boards require use of the lower-numbered DMA channels in the PC (0-3). If you accidentally choose a DMA channel which another card is using, the symptom is usually that no DMA transfers take place (no data is acquired or output on the data acquisition board, or, if the conflict is with a sound card, sounds may not play).

Operating System Components
In order to use DMA to transfer data to or from a data acquisition board, some software components may need to be added to the operating system. For Windows 95, MasterLink requires that two software components be added to Windows in order to perform DMA: vdmad.vxd and mastrlnk.vxd. For Windows NT, MasterLink requires that the mastr_nt.sys software component be installed.

On Windows 95, vdmad.vxd provides certain functions which allow MasterLink to program the DMA hardware in the PC properly for the transfer. These services are present natively in Windows 95, but some of the services are not optimized for data acquisition applications and vdmad.vxd rectifies those oversights. The mastrlnk.vxd component provides functions for MasterLink to use for allocation of memory buffers (as well as other services used by MasterLink which are not DMA-related).

On Windows NT, mastr_nt.sys provides many services, including DMA buffer allocation, which MasterLink uses to implement DMA transfers.

4. What are the details of DMA transfers?

As mentioned in an earlier question, all data transfers performed with DMA use a memory buffer in the PC's memory. Data is transferred in a DMA input process from a data acquisition board to this memory buffer; data is transferred in a DMA output process from this memory buffer to the data acquisition board. Since the CPU of the PC is not involved in the DMA transfer of data, the data typically appears in the DMA buffer in a raw form. This form is usually the individual bytes of data read from or written to the various registers on the data acquisition board. The formats for data, especially analog input data, vary widely from one board to another (because different analog-to-digital converters [A/D converters], use different formats for their data). In general, analog input data in a DMA buffer is represented as shown below:

DMA Buffer

Analog Input Channel 0

Analog Input Channel 1

Analog Input Channel 2

Analog Input Channel 0

Analog Input Channel 1

Note that each analog input channel is transferred to the buffer once, then the first channel is repeated, etc. When digital input data is transferred from a PCI-20041C data acquisition board in combination with analog input data, the data in the DMA buffer is represented as shown below:

Digital I/O

Analog Input Channel 0

Analog Input Port 0

Analog Input Channel 1

Digital Input Port 0

Analog Input Channel 2

Digital Input Port 0

In this case, the digital data from each digital input port is transferred with each of the analog input channels. This layout is used because the analog input channels are multiplexed. That is, there is a single A/D converter for multiple channels. Each time a channel is to be read, the converter is fed data from the next channel and the conversion occurs. Digital input ports, however, are not multiplexed, so the digital data read each time represents the actual data from a single port.

When transferring output data for analog outputs, the buffer layout may be more complicated. The example below shows the buffer data layout for a DMA process which writes waveforms to each of two analog output channels on a PCI-20003M module:

Waveform
Analog Input Channel 0	Strobe Byte
Analog Input Channel 1	Strobe Byte
Analog Input Channel 2	Strobe Byte

Note that there is an extra, dummy byte after each output data item in the buffer. On the analog output module, a special register must be strobed to tell the module to change its output value to the new data value transferred to it with DMA. Note that you do not have to remember to provide these dummy values. MasterLink automatically inserts them into the buffer when using the BUFEncode function (however, you may need to be aware of dummy bytes, as they use buffer memory and may reduce the number of output points you can effectively use in your waveform).

Common Format for Data
Since each type of analog input channel (and, potentially, each type of analog output channel, counter input channel, etc.), may have a different data format, MasterLink provides functions which convert information stored in a DMA buffer into a standard format, based on the data source. Similar functions convert from standard formats for output data into the special coded data stored in the DMA buffer for output channels (like analog output and digital output). The BUFDecode function in MasterLink returns data from a given number of data groups (a group includes one reading from each analog input channel plus readings from any other data types -- the group is defined by the DMA channel list passed to the MasterLink DMAConfigureList function). The BUFEncode function in MasterLink converts from common format data destined for analog and digital output channels into the correct raw format for those channels in the DMA buffer. Each channel type (analog input, analog output, digital input, digital output, counter input, etc.), has a common format representation that MasterLink expects. The formats are given below by channel type:

Analog Input For input ranges which are bipolar (e.g. +/-10V, +/-5V), data is represented as a 16-bit signed integer where 32767 corresponds to full-scale (+10V), and -32768 corresponds to minus full-scale (-10V). For input ranges which are unipolar (e.g. 0-10V, 0-5V), data is represented as a 16-bit unsigned integer where 65535 corresponds to full-scale (10V), and 0 corresponds to 0V.

Analog Output Same as Analog Input
Digital Input Data is represented as a 16-bit unsigned integer with values ranging from 0 to 255.

Digital Output Same as Digital Input
Counter Input Data is represented as a 32-bit unsigned integer. For counter types which are 16 bits wide, values may be in the range 0-65535. For counters which are 32 bits wide, values may be in the range 0-4294967295.

Pacing/Triggering of DMA
A data acquisition DMA process, whether input or output, requires an event to start transfers, an event to stop transfers, and a series of events to indicate when each successive transfer is to occur. The start and stop events are referred to as triggers, while the series of events are referred to as pacers. Typically, a DMA process will be either started or stopped by a software command, with the other event coming from software, some signal on the data acquisition boards, or the completion of a given number of transfers. DMA pacer events usually come from on-board timing sources, such as the rate generator on a PCI-20041C board or the burst generator on a PCI-20098C board.

DMA triggers can come from a number of sources. As mentioned above, the most common is from software commands. The MasterLink DMAStart and DMAStop functions are forms of DMA trigger events (though they perform other necessary tasks, as well). Hardware trigger signals can come from the external interrupt digital inputs on the PCI-20428W, PCI-20041C, and PCI-20098C boards, from the PCI-20020M (analog trigger) module, and from other sources. Each data acquisition board which supports DMA supports a different set of legal trigger sources. Different boards may also support different combinations of starting and stopping on triggers (that is, some boards may not support starting on triggers, while others may not support stopping on hardware triggers, but may support stopping on a given transfer count or under software control).

DMA pacers can also come from a number of sources, but software is typically not used for this function. The pacer function causes analog input (A/D) conversions to occur and the data from the various DMA channels to be transferred between the DMA buffer and the data acquisition board. The use of a hardware pacer allows regularly-spaced samples to be taken from each channel and is one of the advantages of DMA over CPU-controlled transfers. Since the pacing source can be running at high speed (compared to the rate at which CPU-controlled sampling can occur), hardware pacing of DMA allows higher-speed sampling. Each data acquisition board supports a different set of DMA pacer sources, depending upon its capabilities. The PCI-20428W boards provide separate rate generator channels for pacing analog input DMA and analog output DMA, while the PCI-20098C board provides a burst generator for the purpose of pacing analog input DMA.

5. What are DMA handles and lists?

In MasterLink, a 'DMA handle' is a value which is associated with a set of DMA parameters in the same way that a 'file handle' in DOS or UNIX or Windows would be associated with the parameters with which the file was opened. Most DMA-related functions in MasterLink accept a DMA handle and perform their tasks on the DMA process identified by that handle. DMA handles are created by the DMAGetHandle and the DMAGetHugeHandle functions. DMA handles must be released, when they are no longer needed to control DMA processes, using the DMAFreeHandle function.

When a DMA handle is allocated, MasterLink allocates some memory to hold information about the DMA process, including the DMA channel on the PC which is being used, the list of channels to be read (or written, for an output process) by the process, and information on the hardware-specific data format which will be stored in the DMA buffer (allowing translation of the data to/from common format). Each time a DMA or buffer function, such as DMAConfigureList, DMASetOptions, or DMASetPacer is invoked, the information associated with the DMA handle is modified. When the DMAStart function is invoked, the information is used to configure the data acquisition board and the PC for the DMA process. Further, when the DMAStatus or DMAStop function is invoked, the inforrmation is used to determine the status of the process. When the BUFDecode function is invoked to retrieve data from a DMA buffer, the information is used to translate the raw DMA buffer data into common format data.

DMA Lists
Data acquisition boards which support DMA transfer of data must be programmed with a list of I/O channels. These are the channels for which data transfer will occur. Each data acquisition board can have different restrictions on the types of data which are transferred (the PCI-20041C carrier board supports data transfer from both analog input and digital input or to analog output and digital output channels at the same time; the PCI-20098C carrier board supports only analog input data transfer; the PCI-20428W board supports analog input or analog output data transfer). The list of channels to be transferred is set through the DMAConfigureList function and, if analog input data is to be transferred, through the AIConfigureList function. Both functions must be used when analog input data is to be transferred so that gain, range, and input configuration information can be verified and programmed for the analog input channels. The preferred order for invoking these functions is AIConfigureList (to establish the analog input circuitry configuration), followed by DMAConfigureList (to configure the DMA hardware on the data acquisition board for transfer of all channels of interest).

As mentioned earlier in this tutorial, the DMA list defines the contents of the DMA buffer. However, in order to assure proper data layout in the buffer, the channel number ordering for analog input channels in the DMA list and the analog input list must match. For example, if analog input channels 0, 1, and 2 plus digital input port 0 on a PCI-20041C carrier board with a PCI-20341M module installed are to be read, the analog input channel list should indicate channels 0, 1, and 2, in that order. The DMA channel list should indicate analog input channels 0, 1, and 2 (in that order), followed by digital input port 0. In the DMA buffer, the data will be: analog input 0, digital input 0, analog input 1, digital input 0, analog input 2, digital input 0.

6. How does DMA work?

The first step in acquiring data from a data acquisition board via DMA with MasterLink (aside from the driver initialization, etc., which must be performed in all MasterLink applications) is configuration of the I/O channels which are to be read by the process. This might include analog input, digital input, and/or counter input channels, depending upon the hardware used. If analog input channels are to be read, the AIConfigureList function must be invoked to set the gain, range, and input configuration for the channels to be read. If digital input channels are to be read, the DIOConfigure function must be invoked to set the ports for input mode. If counter input channels are to be read, the CTRConfigure or CTR8254Configure function must be invoked to set the counter operating parameters.

At this point, the pacer and trigger (if any) channels which will be used to set the timing of the transfers in the process, and to start or stop the process must be configured. For example, when using a PCI-20428W board for analog input DMA, the analog input rate generator must be configured for the desired acquisition rate using the RGConfigure function.

Establishing Signal Connections
After the pacer and trigger channels have been configured, it will be necessary to make connections between their outputs and the hardware inputs which are strobed to pace or trigger the DMA acquisition. When analog input data is being acquired, the rate generator, burst generator, or other pacer signal must be connected to the start-convert input of the analog input board or module. If expansion modules are used to increase the analog input channel count, they must also receive the rate generator, etc. signal so that they can advance to the next channel, once the previous channel has been read. It is actually the end-of-convert signal from the analog input board which causes data transfer to occur (until the conversion is complete, there is no data to transfer from the analog input channel). On the PCI-20041C carrier, the end-of-convert signal must be separately connected to the DMA pacer input on the carrier board.

When a trigger is used to start or stop the DMA process, the trigger signal must be connected to the DMA trigger input of the data acquisition board. For example, when using the external trigger on the PCI-20428W board, that input signal must be routed to the board's DMA trigger input.

Routing of most signals on PCI-20428W and PCI-20098C boards is accomplished through the SYNCConfigure function. Some signals on these boards, and most signals on the PCI-20041C carrier board, however, must be connected with hardware jumpers prior to in stallation of the board in the PC.

Allocating DMA 'Handle'
Once the input channels and the pacer and trigger are properly configured and connected, a DMA handle must be allocated from MasterLink using the DMAGetHandle or DMAGetHugeHandle function. This handle value is used in the other DMA function invocations. At this point, the DMA channel in the PC which is to be used for the process should be set through the DMASetOptions function.

Configuring Pacer/Trigger
Next, the DMA process must be informed about the pacer and trigger channels in use by the DMA process. This allows the DMAStart and DMAStop functions to start and stop the pacer and enable and disable the trigger source at appropriate times. Identification of the DMA pacer and trigger is performed using the DMASetPacer and DMASetTrigger functions.

Establishing Channel Lists
Once the hardware has been configured, the DMA channel list, which defines which channels will be acquired and in which order, can be set up. This task is performed by the DMAConfigureList function. Note that, when acquiring analog input channels, please be sure that the channel number order specified in the invocation of the AIConfigureList and DMAConfigureList functions matches.

Allocating Buffers
Using the result of the DMAConfigureList function, the buffer for the DMA process can be allocated. The number of bytes of buffer space used to store one reading from each of the channels in the DMA channel list is returned from that function. The product of this value and the number of readings desired from each channel gives the size of the required DMA buffer in bytes. The buffer is allocated using the BUFAllocate function. Once allocated, the buffer should be attached to the DMA process with which it will be used through the BUFAttachProcess function.

Running the Acquisition
At this point, the process is ready to be started. The DMAStart function initiates DMA transfer of data by enabling the trigger and pacer and enabling DMA in the PC. To determine when the DMA process is complete (remember that completion is often determined by the trigger or transfer of a given number of readings from each channel), use the DMAStatus function. If the process is to be terminated under software control, the DMAStop function is used to perform this task.

Decoding the Data
Once the process is complete, the data acquired into the DMA buffer can be retrieved and processed. For this task, the BUFDecode function is used.

7. How is DMA output generated?

The first step in generating output data from a data acquisition board via DMA with MasterLink (aside from the driver initialization, etc., which must be performed in all MasterLink applications) is configuration of the I/O channels which are to be written by the process. This might include analog output and/or digital output channels, depending upon the hardware used. If analog output channels are to be written, the AOConfigure function must be invoked to set the output voltage range. If digital output channels are to be written, the DIOConfigure function must be invoked to set the ports for output mode.
At this point, the pacer and trigger (if any) channels which will be used to set the timing of the transfers in the process, and to start or stop the process must be configured. For example, when using a PCI-20428W board for analog output DMA, the analog output rate generator must be configured for the desired output rate using the RGConfigure function.

Establishing Signal Connections
After the pacer and trigger channels have been configured, it will be necessary to make connections between their outputs and the hardware inputs which are strobed to pace or trigger the DMA acquisition. The pacer signal must be attached to the DMA pacer input of the data acquisition board to control transfer of data during the process. When a trigger is used to start or stop the DMA process, the trigger signal must be connected to the DMA trigger input of the data acquisition board.

Routing of most signals on PCI-20428W and PCI-20098C boards is accomplished through the SYNCConfigure function. Some signals on these boards, and most signals on the PCI-20041C carrier board, however, must be connected with hardware jumpers prior to installation of the board in the PC.

Allocating DMA 'Handle'
Once the output channels and the pacer and trigger are properly configured and connected, a DMA handle must be allocated from MasterLink using the DMAGetHandle or DMAGetHugeHandle function. This handle value is used in the other DMA function invocations. At this point, the DMA channel in the PC which is to be used for the process should be set through the DMASetOptions function.

Configuring Pacer/Trigger
Next, the DMA process must be informed about the pacer and trigger channels in use by the DMA process. This allows the DMAStart and DMAStop functions to start and stop the pacer and enable and disable the trigger source at appropriate times. Configuration of the DMA pacer and trigger is performed using the DMASetPacer and DMASetTrigger functions.

Establishing Channel Lists
Once the hardware has been configured, the DMA channel list, which defines which channels will be written and in which order, can be set up. This task is performed by the DMAConfigureList function.

Allocating Buffers
Using the result of the DMAConfigureList function, the buffer for the DMA process can be allocated. The number of bytes of buffer space used to store one output data point for each of the channels in the DMA channel list is returned from that function. The product of this value and the number of output data points desired for each channel gives the size of the required DMA buffer in bytes. The buffer is allocated using the BUFAllocate function. Once allocated, the buffer should be attached to the DMA process with which it will be used through the BUFAttachProcess function.

Encoding the Data
Now that the buffer has been allocated, the data which will be written to the output hardware can be placed there. The BUFEncode function is used to translate data into a DMA output buffer.

Running the Acquisition
At this point, the process is ready to be started. The DMAStart function initiates DMA transfer of data by enabling the trigger and pacer and enabling DMA in the PC. To determine when the DMA process is complete (remember that completion is often determined by the trigger or transfer of a given number of readings from each channel), use the DMAStatus function. If the process is to be terminated under software control, the DMAStop function is used to perform this task.